Analog functionality testing in mixed signal systems and high-speed radio frequency integrated circuits (RFIC) is a time-consuming and costly process based on the current methodology of manual analog testing. Typical test costs, as a percentage of the manufacturing cost, can be as high as 50% of the total cost, depending on the complexity of the functionality to be tested. The overall cost of an RF system consists of manufacturing, testing (wafer sort and final testing) and packaging. The DC wafer test for RFICs is mainly digital using cheap testers to prune away defective devices. Typically, the RF circuitry is bypassed due to the high cost of RF testers. Unfortunately, RF packaging can represent 30% of the overall cost. Current test practices are expensive because of, among other reasons, the required tester infrastructure, long test times, cumbersome test preparation, lack of appropriate defect and fault models, and lack of standardized test methods.
It is therefore highly desirable to automate the analog testing process with low cost, Built-In Self-Test (BIST) circuitry. Analog test features built into the RF and base-band ASICs can provide not only analog test capability, but also an efficient technique for calibrating and compensating analog circuitry that is sensitive to temperature, supply voltage and process variations. BIST and design for testability (DFT) of analog circuits are important and necessary to produce highly reliable mixed-signal circuits. These approaches normally focus on one or two simple parameter tests such as cut-off frequency of a filter and cannot perform rigorous and complete analog tests such as frequency response, linearity, noise and modulation tests.
The primary goal of prior art was to overcome the complexity of integrating a traditional AC characterization approach. Some AC BIST techniques inject optimized digital inputs into a linear device under test and extract a DC signature. These approaches are simple, but their precision is limited. On the other hand, several methods have been proposed to make frequency-domain tests using on-chip generated sine waves and analyzing the results with an on-chip digital signal processor (DSP). The approach requires 1-bit sigma-delta digital-to-analog converters (DACs) with moderate area overhead. The precision of the generated frequency is not fine enough to support some analog tests such as various analog modulation and linearity test using precise two-tones.